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S5-6U-VPX [S56X] Stratix® V GX/GS 6U VPX Board with two VITA-57 FMC I/O Sites

Rugged Altera Stratix® V GX/GS 6U VPX Board with two VITA-57 FMC I/O Sites

BittWare’s S5-6U-VPX (S56X) is a rugged 6U VPX card based on the high-bandwidth, power-efficient Altera Stratix V GX/GS FPGA. Designed for high-end applications, the Stratix V provides a high level of system integration and flexibility for I/O, routing, and processing. An ARM® Cortex™-A8 control processor provides a complete control plane interface; and a configurable 48-port multi-gigabit transceiver interface supports a variety of protocols, including Serial RapidIO, PCI Express, and 10GigE. The board features up to 8 GB of DDR3 SDRAM as well as Flash memory for booting the FPGAs. Providing additional flexibility are two VITA 57 FMC sites for enhancing the board’s I/O and processing capabilities. The S56X also features a Board Management Controller (BMC) for advanced system monitoring, which greatly simplifies platform management. All of these features combine to make the S56X a versatile and efficient solution for creating and deploying high-performance FPGA computing systems.

Board Architecture

VITA 57 FMC Sites

  • Two VITA 57 FMC sites
  • 8x multi-gigabit transceivers per site
  • 80 LVDS pairs per site
  • Clocks, I2C, JTAG, and reset


  • 2 Altera® Stratix® V GX/GS FPGAs
  • 48 full-duplex, multi-gigabit transceivers @ up to 14.1 GHz
  • Up to 952,000 logic elements per FPGA
  • Up to 62 Mb on-chip memory (per FPGA)
  • 1.4 Gbps LVDS performance
  • Up to 3,926 18×18 variable-precision multipliers (per FPGA)
  • Embedded HardCopy Blocks

External Memory

  • Four banks of up to 2 GByte DDR3 SDRAM configured as x64
  • Two 128 MByte banks of Flash memory for booting FPGA and ARM

ARM® Cortex™-A8 Control Processor

  • 800 MHz ARM® Cortex™-A8 processor (TI AM3871) running Linux
  • Control port interface to Stratix V FPGAs
  • GigE, PCIe, and SATA interfaces
  • Supports host- and Flash-based booting of Stratix V FPGAs
  • Runs BittWorks server for full remote access via the BittWorks II Toolkit

Rear Panel I/O

  • 4 GigE (2 1000BaseT and 2 1000BaseX)
  • 16 multi-gigabit transceivers from rear panel (VPX) to each Stratix V (32 total)
  • 48 LVDS pairs (24 Tx and 24 Rx) and 20 GPIO from VPX backplane to the Stratix V FPGAs via a Cyclone III FPGA

Debug I/O (Utility Header)

  • RS-232 ports to Stratix V and ARM
  • Ethernet interface (10/100)
  • JTAG debug interface to the Stratix V


  • VPX 6U single slot

Board Management Controller

  • Voltage, current, temperature monitoring
  • Power sequencing and reset
  • Field upgrades
  • FPGA configuration and control
  • Clock configuration
  • I2C bus access
  • USB 2.0 and JTAG access
  • Voltage overrides

Development Tools

System Development

  • BittWorks II Toolkit – host, command, and debug tools for BittWare hardware
  • BittWorks II Porting Kit – source code and prebuilt ports for porting the BittWorks II Toolkit to other operating systems

FPGA Development Kit

  • Physical interface components
  • Board, I/O, and timing constraints
  • Example Quartus projects
  • Software components and drivers

FPGA Development

  • Altera Quartus® II software

Accessory Boards

  • BittWare BWBO breakout board for USB, JTAG, RS-232, and Ethernet access
  • BittWare ACC-S56X-BORT rear transition module with QSFP, SFP, RJ-45, JTAG, PCIe x1, SATA, and Ref Clk input