IC-ADC-FMCd – A/D 16-bit, Quad 310 Msps
A/D FMC module
Designed for applications where high data sampling is required, the IC-ADC-FMCd is a VITA 57.1 FPGA Mezzanine Card (FMC).
It offers a flexible connectivity with our FPGA 3U and 6U Front End Processing boards running our Signal Processing Reference Design (including signal acquisition, Processing DMA Engine, data storage, signal generation,…) thus allowing customers to streamline development of high performance signal acquisition systems by concentrating their efforts on their most critical tasks.
- FMC – VITA57.1 HPC compliant
- 4 Channels 16-bit, 310 Msps A/D
- 2 Channels 16-bit, 1150 Msps D/A (Optional)
- SSMC Connectors
- Conduction-cooled compliant
- Two AD9652 Texas Intruments ADCs with 16 bit resolution
- 4 A/D channels with SSMC connectors
- Input impedance: 50 Ohm, AC coupling
- One AD9142A Texas Intruments DAC with 16 bit resolution
- 2 D/A channels with SSMC connectors
- Output impedance: 50 Ohm, AC coupling
- ADC Output : LVDS – 2 channels muxed on a 16-bit parallel bus. Data rate 620 Mbps per LVDS at 310 MSPS
- DAC Input: LVDS – 2 channels mixed on a 16-bit parallel bus. Up to 1150 Mbps per LVDS/ 575 MSPS per channel. Interpolation ratio x1, x2, x8
- Sampling Clock (CKI) or Reference Clock (REFI):
- SSMC connector, 50 Ω , AC coupled
- Input level:
- Sine wave: 0 to +10dB
- Square wave: LVPECL single ended
- Frequency range: >650 MHz
- Clock Output (CLK_OUT) :
- SSMC connector, 50 Ω , AC coupled
- 0.8 V peak-peak
- 300 MHz to 1600 MHz
