IC-FEP-TCAa – Virtex-7 MTCA.4 FPGA Processing Unit with two FMC sites
Virtex-7 MTCA.4 FPGA Processing Unit with two FMC sites
The IC-FEP-TCAa is a FPGA processing engine combining the high processing power of a Xilinx® Virtex-7™ with the substantial bandwidth of the MTCA.4 form factor.
Designed for high performance Signal Processing applications, IC-FEP-TCAa is delivering the best that the current technology can provide. Its Virtex-7 FPGA features thirty six Serdes transceivers.
Two FMC (VITA 57.1) mezzanine sites allow the plugging of ADC, DAC, general IOs, sFPDP or additional FMC modules. In particular, IC has developed a four channels 1300MSPS 12 bit ADC FMC.
With this combination of high performance FPGA, dual FMC sites and high bandwidth MTCA.4 backplane, the IC-FEP-TCAa provides the best platform for very high demanding digital signal processing applications in particular in the High Energy Physics domain.
Main Features
Processing Units
- One Xilinx Virtex-7 XC7VX690T(*) -2 or -3 offering
- Two banks of DDR3: one 64 bit-wide and one 40 bit-wide
- Three Quad SPI flash memory of 256 Mb each supported by iMPACT programming software for “Indirect SPI flash programming” operation
(*): XC7VX330T possible with MOQ
MTCA.4 Interfaces
- One PCIe x4 port
- 16 * Serdes lanes (two of them available for 1000 BASE-X ports – needs corresponding IP)
- 8 * M-LVDS for Trigger, Clock and Interlock Atmel Microcontroller for IPMI
- µRTM interface (I2C, JTAG, Interlocks, 38 * LVDS, 4 * Serdes, according to DESY Class D1.0-4 RevA.3)
FMC Interfaces (for each site from FPGA)
- 2 * GTH x 4 links
- 4 * clock differential signals
- 80 * LVDS
Front panel interfaces
- One USB
Accessories
- Engineering kit for debug : JTAG/COP, console,…
- Rear Transition Module
The IC-FEP-TCAa is available in air-cooled versions.
